1. Technical Field
Various embodiments relate to a semiconductor memory apparatus, and more particularly, to an address input circuit of the semiconductor memory apparatus.
2. Related Art
A semiconductor device, for example, a semiconductor memory apparatus may receive an address from external and perform a read operation to data stored in a memory cell corresponding to the address.
The semiconductor device may receive an address according to the double data rate (DDR) address input mode.
In the DDR address input mode, the semiconductor device may receive the address at both of rising edge and falling edge of a clock.
The semiconductor device should be tested to check whether or not the semiconductor device performs operations normally.
In order to test the semiconductor device that may support the DDR address input mode, test equipment also should support the DDR address input mode.
However, most of test equipment cannot support the DDR address input mode but the single data rate (SDR) address input mode in which an address may be provided only at rising edge of a clock.
High-priced test equipment that may support the DDR address input mode costs a lot for testing the semiconductor device, which is burden in manufacturing costs.